1. Field of the Invention
The present invention relates to a method for testing wafers, and particularly pertains to a wafer test system employing probes to provide for electrical contact with a device under test (DUT) which is located on a wafer. More particularly, the invention is also directed to providing an improved method for implementing wafer tests where the probe force is first characterized by contacting a simulated wafer before contacting the DUT. The simulated wafer incorporates an array of load cells, which measure probe force and planarity of the probe array to the DUT.
Basically, in order to provide appropriately reliable electrical contact with a device under test (DUT, such as electrical circuitry on a wafer having such integrated circuits (IC) located thereon), numerous and diverse types of probes have been developed in the technology, wherein it is normally recognized that each probe type necessitate the employment of a specific probing force. A prober system, for example, such as Tokyo Electron LTD. (TEL) model P12 XL of Japan moves a wafer into precision alignment with an array of probes in order to facilitate contact to the DUT. An insufficient contact force will result in an unreliable electrical contact while an excessive contact force will result in damage to the probes or contact pads on the DUT. Modern probe arrays may incorporate hundreds or thousands of probes to simultaneously contact the corresponding pads on the DUT or array of DUTs. Currently, most methods and arrangements or systems which are employed for wafer testing do not incorporate sufficiently reliable structure or testing steps which will readily or accurately determine the probe force that is being applied to each pad on the DUT during implementation of the testing procedure.
Each probe technology has a characteristic probe compliance or spring rate, thus the correct probe force occurs at a specific probe displacement. Consequently, the current wafer testing practice is to overdrive or displace the wafer the specified distance into the probe system. Unfortunately the resulting forces may result in significant deflection of the probe support structure. This is especially a problem with probe arrays that incorporate a large number of probes; in this case the amount of overdrive must be increased to over come deflection of the support structure. The actual amount of the resultant force is not readily determinable and may be open to conjecture. Thus, a typical overdrive is ordinarily determined experimentally for one particular product, and through extrapolation or assumptions employed for all similar systems and products.
Each product that is tested in a factory will generally have a different number of probes in the array pattern. The probe arrays have a limited life and are replaced regularly as they become worn or damaged. The cost of replacement probe arrays is significant.
If the plane defined by the probe tips is not parallel to the plane of the DUT, some probes will contact the DUT before others, resulting in an application of excessive force on some probes and insufficient force on other probes, even though the total force is correct. Currently available systems can optically measure probe tip planarity only when no load is applied. However, as the support structure deflects, the planarity may further degrade. Thus, it is desirable to measure the total probe force and the planarity of the probe array under the conditions of full overdrive (maximum force). Also, wafer chuck deflection may be different at different locations on the chuck in response to high probe loads. It is thus desirable to be able to measure force and planarity at various locations on the chuck as a function of overdrive.
At this time, several factors are known which affect actual probe force and probe planarity when there is utilized a constant overdrive for the wafer. Thus, this in essence, pertains to the number of probes, types of probes, the stiffness of the wafer chuck which displaces the wafer towards the probe system, the type and stiffness of the device interface board (DIB) that the probes are attached to, the type of tester, the type of probe ring carriers, and the head plate of the equipment being used to effectuate wafer testing. In effect, for each probe set used in manufacturing there is consequently desired to provide for a particular probe overdrive which will result in an optimum force and electrical contact with the electrical circuitry on the wafer, and which will also provide for probe reliability, an extended probe service life and a high product yield evident of an efficient wafer testing procedure.
2. Discussion of the Prior Art
Pursuant to the present state of the technology, there have been developed and placed in use numerous devices for testing wafers and integrated circuits on printed circuit board assemblies.
Reid, et al. U.S. Pat. No. 4,195,259 discloses a probe system and method of using the latter, wherein a plurality of the probes in the array are modified to measure force and probe array planarity. This suffers the disadvantage of adding significant cost and complexity to every probe array that is used in the test operation. It is only applicable to one probe type and it does not measure total probe load.
Veenendaal U.S. Pat. No. 4,673,839 provides a piezoelectric pressure sensing apparatus which measures the total force applied to the probe array. It is only applicable to membrane probes and is an added cost to each probe structure. It measures only the total force, not probe planarity.
Shim, et al. U.S. Pat. No. 5,850,146 also discloses a probe apparatus with integrated force sensor, which is impractical for arrays of large numbers of probes.
Cadieux, et al. U.S. Pat. No. 6,137,299 also discloses a load sensing means integrated into the probe array. It is particularly well suited to testing of known good die. It is not applicable to all probe types.
Khoury, et al. U.S. Pat. No. 6,127,831 discloses a method for the testing of semi-conductor devices, in which probe force is measured as a function of overdrive with a load cell permanently mounted on the side of the wafer support chuck. Testing of the DUT commences only if the probes are within specification. A limitation is that load cells are generally most accurate only under a limited range of forces. If a load cell is designed to measure 50 lb from an array of 2000 probes it will not provide accurate results at 2 lb on an array of 50 probes. An apparatus such as disclosed by Khoury will provide accurate force measurement of an array of probes only if the resultant probe force is perfectly centered over the single load cell. Any off centered force will result in undesirable sideways loads or friction. An additional limitation is that Khoury provides no measure of the degree to which the load is off centered or the probes are not planar.
The inventors have recognized structures from a different field can be improved upon and applied to the field of wafer test. Roeber, U.S. Pat. No. 4,121,049, Peronneau et al. U.S. Pat. No 3,657,475 and a co-pending application by Gardell et al. describe a rigid plate supported by a plurality of load sensors. The location of an external load which is applied to the top of the plate can be accurately determined from the output of load cells and their locations.
Accordingly, in order to provide an improved and novel method of testing wafers with regard to the integrity of electrical circuitry or operative components mounted or arranged thereon, through the implementing of an electrical contact effected through probes with the device under test (DUT), in effect, on the wafer, and also to test the planarity thereof, there is provided an integration of force measurement into the probe system.
Pursuant to the invention, there is provided a simulated wafer wherein a rigid load plate is supported by a plurality of load cells. The load cells are located on a support plate. A retainer attached to the support plate loosely retains the load plate above the support plate and load cells. The simulated wafer is located on the wafer chuck and the chuck is moved upward until the probe array contacts the top of the load plate. The resulting probe load is thus transferred to and measured by the load cells. An advantage of the current invention is that only the load cells support the entire load, there is negligible friction or other support even if the resultant probe load is not perfectly centered. Also only the output force is read directly from each load cell, no additional calibration of the load cells is required.
Since different products have widely differing force requirements and inline tests or memory chips may provide for a total probe force of less than one pound, whereas a fully populated larger product may have a total probe force of over 100 pounds, nevertheless they may be tested on the same chuck. Although it is difficult to design a single force measurement system which is operated under such a wide range of forces. An advantage of the current invention is that several different simulated wafers can be constructed, each using load cells optimized for a specific range of forces.
Moreover, adding a force measurement system to a DIB would be expensive since numerous DIB""s are encountered on site, and contrary to current practice, this aspect is obviated by the novel features of the present invention. In one embodiment of the invention the simulated wafer is portable and can be used in several different prober systems, thus it is not necessary to modify each prober on the site.
Another aspect which is advantageously attained by means of the present invention resides in that it is possible to measure probe planarity over a wide range of probe forces by incorporating three or more suitably spaced load cells into the simulated wafer. In essence, if the load cells are equally spaced and distributed about the center of the probe array, an equal force acting on each load cell would be expected, whereby in the event that one load cell reads higher, it is thus known that the probes on that side of the probe array must be generating a higher force and a non-planar probe set can be suspected. In actual practice, with the appropriate calculations, the load cells do not need to be equally spaced. Additionally the calculations can predict the overtravel that will result in all probes making contact even if the array is not planar to the DUT.
Yet another aspect is that the simulated wafer can be small and moved to various locations on the wafer chuck to determine if chuck planarity and force changes as a function of location on the chuck. For example by local deflections of the chuck at high probe loads. Also it can be mounted to the side of the chuck. Another aspect is that the support plate can be made to approximate the size of the wafers to be tested, the load cells and load plate are located at specific points on the support plate.
Another aspect of the invention is that it can be optimized to work with a particular probe and DUT type. Common probes have a significant deflection of several mils or more at the recommended force, the DUT has a relatively hard metal pad, typically of aluminum, with negligible deflection. For this case the simulated wafer will be designed so the load plate maintains planarity and has minimal deflection, for example by spacing the load cells apart and using load cells with minimal deflection. In contrast to the forgoing, some types of DUTS have compliant pads such as solder balls and are tested with rigid probe systems. In this case it will be advantageous to design a simulated wafer that allows the load plate to tilt and conform to the planarity of the rigid probe array and has compliance similar to the solder balls. This can be advantageously achieved by spacing the load cells close together and recognizing the output of each load cell is proportional to its displacement. Thus from the geometry, the tilt of the load plate is calculated and the resulting deflection of each solder ball is determined.